.gitmodules

[submodule "electronics/libs/spice/KiCad-Spice-Library.git"]
	path = electronics/lib/spice/KiCad-Spice-Library.git
	url = https://github.com/kicad-spice-library/KiCad-Spice-Library.git
[submodule "electronics/fpga/SpartanEdgeAcceleratorBoard/res/Demo_project.git"]
	path = electronics/fpga/SpartanEdgeAcceleratorBoard/references/Demo_project.git
	url = https://github.com/Pillar1989/Demo_project.git
[submodule "electronics/fpga/SpartanEdgeAcceleratorBoard/res/spartan-edge-esp32-boot.git"]
	path = electronics/fpga/SpartanEdgeAcceleratorBoard/references/spartan-edge-esp32-boot.git
	url = https://github.com/Pillar1989/spartan-edge-esp32-boot.git
[submodule "embedded/RISC-V/tutorials/LF-Building-a-RISC-V-CPU-Core"]
	path = embedded/RISC-V/examples/LF-Building-a-RISC-V-CPU-Core
	url = https://github.com/stevehoover/LF-Building-a-RISC-V-CPU-Core.git
[submodule "embedded/RISC-V/tutorials/RISC-V_MYTH_Workshop"]
	path = embedded/RISC-V/examples/RISC-V_MYTH_Workshop
	url = https://github.com/stevehoover/RISC-V_MYTH_Workshop.git
[submodule "embedded/RISC-V/examples/vivado-risc-v"]
	path = embedded/RISC-V/examples/vivado-risc-v
	url = https://github.com/eugene-tarassov/vivado-risc-v.git
[submodule "embedded/RISC-V/examples/cva6"]
	path = embedded/RISC-V/examples/cva6
	url = https://github.com/openhwgroup/cva6.git
[submodule "embedded/RISC-V/examples/rocket-chip"]
	path = embedded/RISC-V/examples/rocket-chip
	url = https://github.com/chipsalliance/rocket-chip.git
[submodule "embedded/RISC-V/examples/xilinx-risc-v"]
	path = embedded/RISC-V/examples/xilinx-risc-v
	url = https://github.com/irmo-de/xilinx-risc-v.git